This document discusses transformer design. It covers selecting an appropriate core size based on constraints like core loss and copper loss. It presents a step-by-step design procedure that involves determining the core size, flux density, turns ratios, wire sizes and other parameters. The effects of switching frequency on transformer size are also considered, with higher frequencies generally allowing for smaller core sizes. Two examples applying the design procedure are provided.
1. The document describes extending the averaged equivalent circuit modeling approach to include effects of switching loss. It involves sketching converter waveforms during switching transitions and approximating their effects.
2. An example is worked through for a buck converter with diode reverse recovery, constructing waveforms and deriving equations for inductor voltage, capacitor current, and input current.
3. The equations are used to build an equivalent circuit model with independent current sources representing switching loss, allowing calculation of efficiency degradation.
Chapter 8 discusses converter transfer functions and Bode plots. It reviews common transfer function elements like poles, zeros and their impact on Bode plots. Specific topics covered include the single pole response, single zero response, right half-plane zeros, and combinations of elements. It also discusses how to analyze converter transfer functions, construct them graphically, and measure real converter transfer functions and impedances. The chapter aims to provide engineers with the tools needed to model, analyze and design power converters.
This document discusses modeling and control of low harmonic rectifiers. It provides expressions for controller duty cycle, DC load current, and converter efficiency based on an averaged model. It also describes several controller schemes including average current control, feedforward control, and current programmed control. Design examples are provided to illustrate calculation of key parameters like output voltage and MOSFET on-resistance needed to achieve a given efficiency.
The document describes the process of constructing steady-state equivalent circuit models for DC-DC power converters. Key steps include:
1) Deriving loop and node equations from circuit analyses during switching intervals.
2) Representing the equations as equivalent circuits using dependent sources and transformers.
3) Solving the equivalent circuit to obtain output characteristics like voltage conversion ratio and efficiency.
Losses from resistances and semiconductor voltages can be included to make the model more accurate. The equivalent circuit approach provides a time-invariant model of the converter under steady-state conditions.
The chapter discusses input filter design for power electronics converters. It introduces the concepts of conducted electromagnetic interference (EMI) and how input filters can attenuate current harmonics to meet EMI regulations. However, input filters can negatively impact converter stability by changing the converter transfer functions. The chapter then examines how to analyze these impacts and provides criteria for proper input filter design, such as imposing impedance inequalities to minimize effects on stability. Sample impedance models are also presented for common converter types.
This chapter discusses controller design for power electronics. It begins by introducing negative feedback loops and their effects of reducing disturbances and making the output insensitive to variations in the forward path. Key terms like open-loop, closed-loop, loop gain, and transfer functions are defined. Stability is then analyzed using the phase margin test, which evaluates the phase of the loop gain at the crossover frequency to determine if the closed-loop system contains any right half-plane poles. The chapter covers designing compensators to shape the loop gain for stability and performance. It concludes with measuring loop gains using injection techniques.
The document discusses the design of filter inductors for power electronics applications. It covers various types of magnetic devices and their operating principles. The key constraints in inductor design are discussed as maximizing flux density without saturation, achieving the required inductance value, fitting the winding within the core window, and meeting the target winding resistance. A step-by-step procedure is outlined that involves selecting a suitable core based on its geometrical constant and calculating the necessary air gap length.
This chapter discusses principles of steady-state analysis of DC-DC power converters. It introduces inductor volt-second balance and capacitor charge balance, which relate the average inductor voltage and capacitor current to be zero during steady-state. A small ripple approximation is used to simplify analysis by ignoring output voltage ripple. Examples of steady-state analysis of the buck and boost converters are presented using these principles to determine output voltage, inductor current, and capacitor sizing for given ripple levels.
1. The document describes extending the averaged equivalent circuit modeling approach to include effects of switching loss. It involves sketching converter waveforms during switching transitions and approximating their effects.
2. An example is worked through for a buck converter with diode reverse recovery, constructing waveforms and deriving equations for inductor voltage, capacitor current, and input current.
3. The equations are used to build an equivalent circuit model with independent current sources representing switching loss, allowing calculation of efficiency degradation.
Chapter 8 discusses converter transfer functions and Bode plots. It reviews common transfer function elements like poles, zeros and their impact on Bode plots. Specific topics covered include the single pole response, single zero response, right half-plane zeros, and combinations of elements. It also discusses how to analyze converter transfer functions, construct them graphically, and measure real converter transfer functions and impedances. The chapter aims to provide engineers with the tools needed to model, analyze and design power converters.
This document discusses modeling and control of low harmonic rectifiers. It provides expressions for controller duty cycle, DC load current, and converter efficiency based on an averaged model. It also describes several controller schemes including average current control, feedforward control, and current programmed control. Design examples are provided to illustrate calculation of key parameters like output voltage and MOSFET on-resistance needed to achieve a given efficiency.
The document describes the process of constructing steady-state equivalent circuit models for DC-DC power converters. Key steps include:
1) Deriving loop and node equations from circuit analyses during switching intervals.
2) Representing the equations as equivalent circuits using dependent sources and transformers.
3) Solving the equivalent circuit to obtain output characteristics like voltage conversion ratio and efficiency.
Losses from resistances and semiconductor voltages can be included to make the model more accurate. The equivalent circuit approach provides a time-invariant model of the converter under steady-state conditions.
The chapter discusses input filter design for power electronics converters. It introduces the concepts of conducted electromagnetic interference (EMI) and how input filters can attenuate current harmonics to meet EMI regulations. However, input filters can negatively impact converter stability by changing the converter transfer functions. The chapter then examines how to analyze these impacts and provides criteria for proper input filter design, such as imposing impedance inequalities to minimize effects on stability. Sample impedance models are also presented for common converter types.
This chapter discusses controller design for power electronics. It begins by introducing negative feedback loops and their effects of reducing disturbances and making the output insensitive to variations in the forward path. Key terms like open-loop, closed-loop, loop gain, and transfer functions are defined. Stability is then analyzed using the phase margin test, which evaluates the phase of the loop gain at the crossover frequency to determine if the closed-loop system contains any right half-plane poles. The chapter covers designing compensators to shape the loop gain for stability and performance. It concludes with measuring loop gains using injection techniques.
The document discusses the design of filter inductors for power electronics applications. It covers various types of magnetic devices and their operating principles. The key constraints in inductor design are discussed as maximizing flux density without saturation, achieving the required inductance value, fitting the winding within the core window, and meeting the target winding resistance. A step-by-step procedure is outlined that involves selecting a suitable core based on its geometrical constant and calculating the necessary air gap length.
This chapter discusses principles of steady-state analysis of DC-DC power converters. It introduces inductor volt-second balance and capacitor charge balance, which relate the average inductor voltage and capacitor current to be zero during steady-state. A small ripple approximation is used to simplify analysis by ignoring output voltage ripple. Examples of steady-state analysis of the buck and boost converters are presented using these principles to determine output voltage, inductor current, and capacitor sizing for given ripple levels.
This chapter discusses the design of inductors and coupled inductors. It presents the key constraints in inductor design including maximum flux density, inductance, winding area, and winding resistance. It then provides a step-by-step design procedure that involves selecting a core, determining the air gap length, number of turns, and wire size. Methods for designing multiple-winding magnetics using the Kg method are also described, including how to allocate window area between windings to minimize copper losses.
This chapter discusses discontinuous conduction mode (DCM) in power electronics. DCM occurs when inductor current or capacitor voltage ripple causes the applied switch current or voltage to reverse polarity. Analysis techniques for DCM include inductor volt-second balance and capacitor charge balance. The chapter provides an example analysis of a buck converter in DCM and derives the mode boundary and conversion ratio equations.
This document provides an introduction to power electronics. It discusses various power electronic applications including power supplies, motor drives, and utility transmission systems. It also covers common power electronic components like switches, capacitors, inductors, and semiconductor devices. The document outlines the topics that will be covered in the course, including converter circuit operation, control systems, magnetics design, rectifiers, and resonant converters.
This document summarizes Chapter 17 of the textbook "Fundamentals of Power Electronics" which covers line-commutated rectifiers. It discusses single-phase and three-phase full-wave rectifiers in both continuous and discontinuous conduction modes. It also describes phase control of rectifiers, harmonic trap filters used to reduce harmonics, and different transformer connections that can shift voltages and currents to cancel harmonics. The chapter provides analysis of rectifier circuits including harmonic content, power factor, and efficiency over a range of operating conditions.
The document discusses quasi-resonant converters and the half-wave zero-current-switching quasi-resonant switch cell. The switch cell uses a small resonant inductor and capacitor to achieve zero-current switching of the transistor. It operates in four subintervals per switching period: 1) transistor on, 2) resonant ringing, 3) capacitor discharging, 4) diode on. Mathematical analysis determines the waveforms and durations of each subinterval. Averaging the switch cell currents and voltages gives the conversion ratio, allowing the cell to be analyzed and incorporated into converter circuits.
This chapter discusses power and harmonics in nonsinusoidal systems. It covers average power calculation using Fourier series, RMS value calculation, power factor, and harmonic distortion. Power factor is defined as the ratio of average power to apparent power. Harmonics always increase RMS values but do not necessarily increase average power. Harmonics reduce the power factor for nonlinear loads fed by sinusoidal voltages. Three-phase systems can experience overloading of neutral conductors and capacitors due to harmonic currents.
This 3 sentence summary provides the key details about the document:
The document describes the design of a low-voltage low-dropout (LDO) voltage regulator that can operate from an input of 1V down to an output of 0.85V-0.5V. It uses a simple symmetric operational transconductance amplifier as the error amplifier with a current splitting technique to boost gain and bandwidth. Simulation results showed the proposed LDO regulator achieved 99.94% current efficiency, a 28mV output variation for a 0-100mA load transient, and 50dB power supply rejection from 0-100kHz, while only requiring an area of 0.0041mm2.
IC Design of Power Management Circuits (I)Claudia Sin
This document provides an overview of a tutorial on integrated circuit design of power management circuits. The tutorial covers topics such as switching converters, including fundamentals and control techniques; bandgap references; charge pumps; and low dropout regulators. It lists these topics along with brief descriptions in an agenda. It then begins discussing switching converters in more detail, covering concepts such as steady state analysis, lossless elements, buck, boost and buck-boost converter topologies, volt-second balance, continuous and discontinuous conduction modes, and efficiency calculations.
This document provides an overview of voltage references and describes a lecture on bandgap voltage references. It discusses the performance requirements of voltage references including accuracy, stability, load regulation, and thermal stability. It then summarizes zener diode references and describes how a bandgap voltage reference works by combining the positive temperature coefficient of thermal voltage VT with the negative coefficient of the base-emitter voltage VBE to produce an output voltage independent of temperature. The document explains the fundamentals and shows a bandgap voltage reference circuit using two bipolar transistors with different emitter areas to generate proportional to absolute temperature (PTAT) and complementary to absolute temperature (CTAT) voltages.
IC Design of Power Management Circuits (IV)Claudia Sin
by Wing-Hung Ki
Integrated Power Electronics Laboratory
ECE Dept., HKUST
Clear Water Bay, Hong Kong
www.ee.ust.hk/~eeki
International Symposium on Integrated Circuits
Singapore, Dec. 14, 2009
IC Design of Power Management Circuits (II)Claudia Sin
The document discusses various aspects of integrated circuit design for power management circuits. It covers control loop design including biasing circuits, oscillators, comparators and operational amplifiers. It also discusses power stage design such as power transistors, synchronous rectification and active diodes. Finally it discusses peripheral circuits including undervoltage lockout, overcurrent protection and soft start circuits. The document provides guidelines and examples for analog integrated circuit design of switching converters and related circuits.
IC Design of Power Management Circuits (I)Claudia Sin
by Wing-Hung Ki
Integrated Power Electronics Laboratory
ECE Dept., HKUST
Clear Water Bay, Hong Kong
www.ee.ust.hk/~eeki
International Symposium on Integrated Circuits
Singapore, Dec. 14, 2009
IC Design of Power Management Circuits (III)Claudia Sin
This document discusses stability and compensation techniques for switching converters. It begins by introducing feedback systems and stability criteria such as the Nyquist criterion and Bode plots. It then examines loop gain functions of different orders and their impact on stability and transient response. Several common compensation techniques are described, including type I, II, and III compensators. The document concludes by discussing stability evaluation based on line and load transients and current mode pulse width modulation with compensation ramps.
1) The document discusses current and voltage transformers, covering their circuit models, performance standards, accuracy classes, and transient behavior.
2) It provides details on current transformer ratings including accuracy classes, phase displacement, and transient overdimensioning factors.
3) The standards for voltage transformers are also summarized, outlining classes based on voltage and angle errors.
The document discusses improving the efficiency and linearity of RF power amplifiers. It proposes using a technique called outphasing which decomposes the input signal into constant amplitude signals. Additionally, it introduces using specially optimized nonlinear Q-filters to process the decomposed signals in order to improve the spectral content without sacrificing the peak-to-average power ratio. This enhances the linearity and relaxes the stringent alignment requirements of traditional outphasing amplifiers, making the technique more practical to implement. The key innovation is the use of these nonlinear Q-filters applied in the digital domain to optimize the tradeoff between spectral content and signal crest factor.
This document provides an overview of key concepts related to radio frequency (RF) power amplifiers. It defines gain as the ratio of output power to input power in decibels and explains how gain can be expressed in terms of voltage, current, or power. Formulas are given for efficiency metrics like collector efficiency, overall efficiency, and power added efficiency. The power output capability parameter is introduced as a measure of the maximum output power produced by an amplifier given its peak collector voltage and current.
Designed a Switched Capacitor Low Pass Filter with a sampling frequency of 60 Hz.
Simulated the filter to have a ripple within 0.2 dB under 3.6 MHz and a stopband attenuation of atleast -51 dB after 7.2 MHz.
Applied dynamic range optimization, Dynamic Range Scaling and Chip Area scaling to get maximum output swing while occupying minimum area on chip.
Tested the filter with non-idealities of the amplifier, such as finite gain, bandwidth, offset voltage, charge injection, etc.
This document summarizes a study on an Integrated Bi-directional Flyback Converter (IBFBC) that allows a supercapacitor module to be charged and discharged by a single converter device in a hybrid renewable energy system. The IBFBC topology, component values, and switching signals are described. Simulation results show the converter can charge the supercapacitor from 24V to 48V and discharge it back to 24V, but becomes unstable below a 27% drop in supercapacitor voltage. The IBFBC was found to be a simple bidirectional topology using few components to interconnect energy storage with a DC bus.
This document describes the implementation of a bandgap reference circuit. It was designed by M. Lingadhar Reddy under the guidance of Mr. G. Shiva Kumar at GITAM University in Hyderabad, India from 2013-2015. The document outlines the basic operation of a bandgap reference circuit, which produces a reference voltage that is stable over changes in temperature, supply voltage, and process parameters. It discusses the tool and technology used, different approaches to bandgap references, and details the design and simulation results of a two-stage CMOS operational amplifier and final bandgap reference circuit implemented in a 90nm CMOS technology using Cadence Virtuoso.
This document discusses voltage regulation and summarizes the key characteristics and equations for various voltage regulation devices:
1. Step-type voltage regulators, load tap changing transformers, and shunt capacitors are common methods for regulating voltage.
2. It provides the generalized constants (a, b, c, d) that model single-phase transformers, auto-transformers, and voltage regulators as two-port networks. These constants allow modeling the input-output voltage and current relationships.
3. It summarizes the characteristics of step voltage regulators, including the differences between Type A and Type B regulators. Type B regulators are more common and have constant core excitation since the shunt winding is connected to the control circuit. The
This document summarizes the key steps in designing a transformer, including:
1. Selecting an appropriate core size based on specifications and material properties to minimize total power loss.
2. Calculating the optimum operating flux density based on voltage, current, and core geometry.
3. Determining the required number of turns for each winding based on voltage and flux density.
4. Sizing the wire gauges for each winding based on current and available winding area.
The procedure is then demonstrated through an example design of a transformer for a Cuk converter.
Current Transformers parameter design and graphs - size and design requirementsssuser39bdb9
This document discusses current transformers (CTs), including their function, construction, standards, ratings, and designations. CTs are used to reduce high currents to lower, more easily measurable values and to isolate secondary circuits from primary currents. Key points covered include:
- CTs reduce power system currents to lower values for measurement and insulate secondary circuits from primary currents.
- Standards for CTs include IEC, European, British, American, Canadian, and Australian.
- CTs are constructed with either a bar or wound primary and have defined polarity and testing procedures.
- Basic theory explains how CTs transfer current based on turns ratio and induce a voltage to power secondary devices.
- Ratings include rated
This chapter discusses the design of inductors and coupled inductors. It presents the key constraints in inductor design including maximum flux density, inductance, winding area, and winding resistance. It then provides a step-by-step design procedure that involves selecting a core, determining the air gap length, number of turns, and wire size. Methods for designing multiple-winding magnetics using the Kg method are also described, including how to allocate window area between windings to minimize copper losses.
This chapter discusses discontinuous conduction mode (DCM) in power electronics. DCM occurs when inductor current or capacitor voltage ripple causes the applied switch current or voltage to reverse polarity. Analysis techniques for DCM include inductor volt-second balance and capacitor charge balance. The chapter provides an example analysis of a buck converter in DCM and derives the mode boundary and conversion ratio equations.
This document provides an introduction to power electronics. It discusses various power electronic applications including power supplies, motor drives, and utility transmission systems. It also covers common power electronic components like switches, capacitors, inductors, and semiconductor devices. The document outlines the topics that will be covered in the course, including converter circuit operation, control systems, magnetics design, rectifiers, and resonant converters.
This document summarizes Chapter 17 of the textbook "Fundamentals of Power Electronics" which covers line-commutated rectifiers. It discusses single-phase and three-phase full-wave rectifiers in both continuous and discontinuous conduction modes. It also describes phase control of rectifiers, harmonic trap filters used to reduce harmonics, and different transformer connections that can shift voltages and currents to cancel harmonics. The chapter provides analysis of rectifier circuits including harmonic content, power factor, and efficiency over a range of operating conditions.
The document discusses quasi-resonant converters and the half-wave zero-current-switching quasi-resonant switch cell. The switch cell uses a small resonant inductor and capacitor to achieve zero-current switching of the transistor. It operates in four subintervals per switching period: 1) transistor on, 2) resonant ringing, 3) capacitor discharging, 4) diode on. Mathematical analysis determines the waveforms and durations of each subinterval. Averaging the switch cell currents and voltages gives the conversion ratio, allowing the cell to be analyzed and incorporated into converter circuits.
This chapter discusses power and harmonics in nonsinusoidal systems. It covers average power calculation using Fourier series, RMS value calculation, power factor, and harmonic distortion. Power factor is defined as the ratio of average power to apparent power. Harmonics always increase RMS values but do not necessarily increase average power. Harmonics reduce the power factor for nonlinear loads fed by sinusoidal voltages. Three-phase systems can experience overloading of neutral conductors and capacitors due to harmonic currents.
This 3 sentence summary provides the key details about the document:
The document describes the design of a low-voltage low-dropout (LDO) voltage regulator that can operate from an input of 1V down to an output of 0.85V-0.5V. It uses a simple symmetric operational transconductance amplifier as the error amplifier with a current splitting technique to boost gain and bandwidth. Simulation results showed the proposed LDO regulator achieved 99.94% current efficiency, a 28mV output variation for a 0-100mA load transient, and 50dB power supply rejection from 0-100kHz, while only requiring an area of 0.0041mm2.
IC Design of Power Management Circuits (I)Claudia Sin
This document provides an overview of a tutorial on integrated circuit design of power management circuits. The tutorial covers topics such as switching converters, including fundamentals and control techniques; bandgap references; charge pumps; and low dropout regulators. It lists these topics along with brief descriptions in an agenda. It then begins discussing switching converters in more detail, covering concepts such as steady state analysis, lossless elements, buck, boost and buck-boost converter topologies, volt-second balance, continuous and discontinuous conduction modes, and efficiency calculations.
This document provides an overview of voltage references and describes a lecture on bandgap voltage references. It discusses the performance requirements of voltage references including accuracy, stability, load regulation, and thermal stability. It then summarizes zener diode references and describes how a bandgap voltage reference works by combining the positive temperature coefficient of thermal voltage VT with the negative coefficient of the base-emitter voltage VBE to produce an output voltage independent of temperature. The document explains the fundamentals and shows a bandgap voltage reference circuit using two bipolar transistors with different emitter areas to generate proportional to absolute temperature (PTAT) and complementary to absolute temperature (CTAT) voltages.
IC Design of Power Management Circuits (IV)Claudia Sin
by Wing-Hung Ki
Integrated Power Electronics Laboratory
ECE Dept., HKUST
Clear Water Bay, Hong Kong
www.ee.ust.hk/~eeki
International Symposium on Integrated Circuits
Singapore, Dec. 14, 2009
IC Design of Power Management Circuits (II)Claudia Sin
The document discusses various aspects of integrated circuit design for power management circuits. It covers control loop design including biasing circuits, oscillators, comparators and operational amplifiers. It also discusses power stage design such as power transistors, synchronous rectification and active diodes. Finally it discusses peripheral circuits including undervoltage lockout, overcurrent protection and soft start circuits. The document provides guidelines and examples for analog integrated circuit design of switching converters and related circuits.
IC Design of Power Management Circuits (I)Claudia Sin
by Wing-Hung Ki
Integrated Power Electronics Laboratory
ECE Dept., HKUST
Clear Water Bay, Hong Kong
www.ee.ust.hk/~eeki
International Symposium on Integrated Circuits
Singapore, Dec. 14, 2009
IC Design of Power Management Circuits (III)Claudia Sin
This document discusses stability and compensation techniques for switching converters. It begins by introducing feedback systems and stability criteria such as the Nyquist criterion and Bode plots. It then examines loop gain functions of different orders and their impact on stability and transient response. Several common compensation techniques are described, including type I, II, and III compensators. The document concludes by discussing stability evaluation based on line and load transients and current mode pulse width modulation with compensation ramps.
1) The document discusses current and voltage transformers, covering their circuit models, performance standards, accuracy classes, and transient behavior.
2) It provides details on current transformer ratings including accuracy classes, phase displacement, and transient overdimensioning factors.
3) The standards for voltage transformers are also summarized, outlining classes based on voltage and angle errors.
The document discusses improving the efficiency and linearity of RF power amplifiers. It proposes using a technique called outphasing which decomposes the input signal into constant amplitude signals. Additionally, it introduces using specially optimized nonlinear Q-filters to process the decomposed signals in order to improve the spectral content without sacrificing the peak-to-average power ratio. This enhances the linearity and relaxes the stringent alignment requirements of traditional outphasing amplifiers, making the technique more practical to implement. The key innovation is the use of these nonlinear Q-filters applied in the digital domain to optimize the tradeoff between spectral content and signal crest factor.
This document provides an overview of key concepts related to radio frequency (RF) power amplifiers. It defines gain as the ratio of output power to input power in decibels and explains how gain can be expressed in terms of voltage, current, or power. Formulas are given for efficiency metrics like collector efficiency, overall efficiency, and power added efficiency. The power output capability parameter is introduced as a measure of the maximum output power produced by an amplifier given its peak collector voltage and current.
Designed a Switched Capacitor Low Pass Filter with a sampling frequency of 60 Hz.
Simulated the filter to have a ripple within 0.2 dB under 3.6 MHz and a stopband attenuation of atleast -51 dB after 7.2 MHz.
Applied dynamic range optimization, Dynamic Range Scaling and Chip Area scaling to get maximum output swing while occupying minimum area on chip.
Tested the filter with non-idealities of the amplifier, such as finite gain, bandwidth, offset voltage, charge injection, etc.
This document summarizes a study on an Integrated Bi-directional Flyback Converter (IBFBC) that allows a supercapacitor module to be charged and discharged by a single converter device in a hybrid renewable energy system. The IBFBC topology, component values, and switching signals are described. Simulation results show the converter can charge the supercapacitor from 24V to 48V and discharge it back to 24V, but becomes unstable below a 27% drop in supercapacitor voltage. The IBFBC was found to be a simple bidirectional topology using few components to interconnect energy storage with a DC bus.
This document describes the implementation of a bandgap reference circuit. It was designed by M. Lingadhar Reddy under the guidance of Mr. G. Shiva Kumar at GITAM University in Hyderabad, India from 2013-2015. The document outlines the basic operation of a bandgap reference circuit, which produces a reference voltage that is stable over changes in temperature, supply voltage, and process parameters. It discusses the tool and technology used, different approaches to bandgap references, and details the design and simulation results of a two-stage CMOS operational amplifier and final bandgap reference circuit implemented in a 90nm CMOS technology using Cadence Virtuoso.
This document discusses voltage regulation and summarizes the key characteristics and equations for various voltage regulation devices:
1. Step-type voltage regulators, load tap changing transformers, and shunt capacitors are common methods for regulating voltage.
2. It provides the generalized constants (a, b, c, d) that model single-phase transformers, auto-transformers, and voltage regulators as two-port networks. These constants allow modeling the input-output voltage and current relationships.
3. It summarizes the characteristics of step voltage regulators, including the differences between Type A and Type B regulators. Type B regulators are more common and have constant core excitation since the shunt winding is connected to the control circuit. The
This document summarizes the key steps in designing a transformer, including:
1. Selecting an appropriate core size based on specifications and material properties to minimize total power loss.
2. Calculating the optimum operating flux density based on voltage, current, and core geometry.
3. Determining the required number of turns for each winding based on voltage and flux density.
4. Sizing the wire gauges for each winding based on current and available winding area.
The procedure is then demonstrated through an example design of a transformer for a Cuk converter.
Current Transformers parameter design and graphs - size and design requirementsssuser39bdb9
This document discusses current transformers (CTs), including their function, construction, standards, ratings, and designations. CTs are used to reduce high currents to lower, more easily measurable values and to isolate secondary circuits from primary currents. Key points covered include:
- CTs reduce power system currents to lower values for measurement and insulate secondary circuits from primary currents.
- Standards for CTs include IEC, European, British, American, Canadian, and Australian.
- CTs are constructed with either a bar or wound primary and have defined polarity and testing procedures.
- Basic theory explains how CTs transfer current based on turns ratio and induce a voltage to power secondary devices.
- Ratings include rated
IRJET- Design and Fabrication of a Single-Phase 1KVA Transformer with Aut...IRJET Journal
1) The document describes the design and fabrication of a 1KVA, single-phase shell type transformer with an automatic cooling system. It discusses the core and winding designs based on specifications like voltage and power ratings.
2) A temperature sensor circuit with a thermistor is used to sense the temperature. When the temperature increases above a preset level, a DC fan is automatically switched on to cool the transformer. It is switched off once the temperature decreases.
3) The transformer is designed to output two voltages - 115V and 120V from an input of 230V, without any tapping. This is achieved through appropriate winding designs based on design calculations.
Enhancing the Design of VRM for Testing Magnetic ComponentsIJERA Editor
This document describes the design of a voltage regulator module (VRM) circuit that can be used to test different magnetic component designs. It provides a detailed step-by-step design procedure for a 12V to 1.3V @ 120A VRM circuit including selecting component values through calculations. The goal of the design is to maintain a constant output voltage under varying and transient load conditions. Finally, the circuit is simulated in PSPICE and all components are ordered to build the circuit to test inductors and transformers.
There are three main components of power dissipation in CMOS circuits: dynamic capacitive power from charging/discharging capacitances, short-circuit power from direct paths between supply rails during switching, and leakage power from subthreshold and reverse-biased junction currents. To reduce power, one can lower the supply voltage and switching activity, reduce physical capacitances, and match rise/fall times of input/output waveforms to minimize short-circuit power. Optimizing transistor sizing, circuits, and architectures can also reduce leakage and glitching for lower overall power.
The document discusses the design considerations for a synchronous generator with a round rotor. It covers topics such as:
- The maximum allowable rotor peripheral speed is typically 250 m/s for modern steel alloys.
- Formulas are provided for calculating copper resistivity based on temperature, as well as the number of turns and conductor size for the generator armature winding.
- Other factors discussed include the number of armature slots based on the number of phases, length/diameter ratio, air gap size selection, and rotor slot design considerations such as the number of poles and slots.
This document provides a design workflow for a step-down DC-DC converter using the NJM2309 PWM controller IC. The workflow includes: [1] setting the controller parameters; [2] selecting resistor values for the output voltage; [3] choosing the inductor and capacitor values; [4] adding compensation to stabilize the converter; and [5] simulating the load transient response. Appendices provide additional details on compensation calculation and feedback loop types.
This document discusses power consumption in CMOS devices. It outlines the main sources of power dissipation including dynamic power, short circuit power, and static/leakage power. Dynamic power is proportional to the capacitive load and supply voltage. Short circuit power depends on the peak short circuit current. Static power includes leakage from reverse biased p-n junctions, subthreshold leakage, gate leakage, gate induced drain leakage, and punchthrough. The document discusses various techniques to reduce each component of power dissipation such as lowering supply voltage, increasing threshold voltage, and power gating.
This document describes research on developing multi-functional and reconfigurable microwave control devices. It discusses a proposed novel broadband tunable rat-race coupler with increased bandwidth and tuning ratio, as well as a compact variable power divider design using integrated transformers for CMOS implementation. It also proposes a varactor-tuned variable attenuator design with wide tuning range and flat insertion loss for applications requiring signal power control. Measurement results demonstrate tuning capabilities and good performance over bandwidth for both designs.
This document discusses digital VLSI design and power optimization. It covers several topics:
- Sources of power consumption in CMOS circuits including static, short circuit, leakage, and dynamic power
- Derivations of equations for short circuit and dynamic power
- How to reduce power consumption by decreasing supply voltage, output swing, load capacitance, and switching activity
- Sizing transistors for minimum power given a delay constraint
- Graphical techniques for finding optimum voltage and frequency to minimize energy delay product
Research Inventy : International Journal of Engineering and Scienceresearchinventy
This document summarizes a research paper that proposes a precision full-wave rectifier circuit design using carbon nanotube field effect transistors (CNTFETs) and differential difference current conveyors (DDCCs). Key points include:
- CNTFET technology offers advantages over traditional CMOS for high frequency performance including higher packaging density and temperature stability.
- A DDCC device is presented that uses CNTFETs instead of CMOS transistors. Simulation results show the input-output characteristics of the proposed CNTFET-based DDCC.
- A precision full-wave rectifier circuit is designed using the CNTFET-based DDCC. Simulation results validate the performance of the rectifier circuit design.
PARASITIC-AWARE FULL PHYSICAL CHIP DESIGN OF LNA RFIC AT 2.45GHZ USING IBM 13...Ilango Jeyasubramanian
This document summarizes the design of a low noise amplifier (LNA) operating at 2.45GHz. The LNA uses a cascode topology with inductive source degeneration implemented in a 120nm CMOS process. Simulation results show the LNA meets specifications for gain, return loss, output match, noise figure, and linearity over 2.4-2.5GHz. Variability analysis demonstrates performance remains within specifications with +/-10% parameter variations. The compact layout achieves good matching through careful device placement and use of appropriate passive components to minimize parasitics.
This document provides an overview of PSPICE and how to use it to simulate analog circuits. It describes the different types of input files for PSPICE, how to define circuit components and models, and the various analysis statements like .OP, .DC, .AC, and .TRAN to set up DC operating point, DC sweep, AC, and transient analyses respectively. It also covers topics like subcircuits, semiconductor device models, and scale factors for numbers in PSPICE.
Design and Implementation of Low Power Multiplier Using Proposed Two Phase Cl...IJECEIAES
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https://bit.ly/Automation_Student_Kickstart
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UiPath Business Automation Platform
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QA or the Highway - Component Testing: Bridging the gap between frontend appl...
Chapter 15
1. Fundamentals of Power Electronics Chapter 15: Transformer design1
Chapter 15 Transformer Design
Some more advanced design issues, not considered in previous
chapter:
• Inclusion of core loss
• Selection of operating flux
density to optimize total loss
• Multiple winding design: as in
the coupled-inductor case,
allocate the available window
area among several windings
• A transformer design
procedure
• How switching frequency
affects transformer size
n1 : n2
: nk
R1 R2
Rk
+
v1(t)
–
+
v2(t)
–
+
vk(t)
–
i1(t) i2(t)
ik(t)
2. Fundamentals of Power Electronics Chapter 15: Transformer design2
Chapter 15 Transformer Design
15.1 Transformer design: Basic constraints
15.2 A step-by-step transformer design procedure
15.3 Examples
15.4 AC inductor design
15.5 Summary
3. Fundamentals of Power Electronics Chapter 15: Transformer design3
15.1 Transformer Design:
Basic Constraints
Core loss
Typical value of for ferrite materials: 2.6 or 2.7
B is the peak value of the ac component of B(t), i.e., the peak ac flux
density
So increasing B causes core loss to increase rapidly
This is the first constraint
Pfe = K fe(∆B)β
Ac lm
4. Fundamentals of Power Electronics Chapter 15: Transformer design4
Flux density
Constraint #2
Flux density B(t) is related to the
applied winding voltage according
to Faraday’s Law. Denote the volt-
seconds applied to the primary
winding during the positive portion
of v1(t) as 1:
λ1 = v1(t)dt
t1
t2
This causes the flux to change from
its negative peak to its positive peak.
From Faraday’s law, the peak value
of the ac component of flux density is
To attain a given flux density,
the primary turns should be
chosen according to
area λ1
v1(t)
t1 t2 t
∆B =
λ1
2n1Ac
n1 =
λ1
2∆BAc
5. Fundamentals of Power Electronics Chapter 15: Transformer design5
Copper loss
Constraint #3
• Allocate window area between windings in optimum manner, as
described in previous section
• Total copper loss is then equal to
Pcu =
ρ(MLT)n1
2
Itot
2
WAKu
Itot =
nj
n1
IjΣj = 1
k
with
Eliminate n1, using result of previous slide:
Note that copper loss decreases rapidly as B is increased
Pcu =
ρλ1
2
Itot
2
4Ku
(MLT)
WAAc
2
1
∆B
2
6. Fundamentals of Power Electronics Chapter 15: Transformer design6
Total power loss
4. Ptot = Pcu + Pfe
Ptot = Pfe + Pcu
There is a value of B
that minimizes the total
power loss
Pcu =
ρλ1
2
Itot
2
4Ku
(MLT)
WAAc
2
1
∆B
2
Pfe = K fe(∆B)β
Ac lm
∆B
Power
loss
Ptot
CopperlossPcu
CorelossP
fe
Optimum ∆B
7. Fundamentals of Power Electronics Chapter 15: Transformer design7
5. Find optimum flux density B
Ptot = Pfe + Pcu
Given that
Then, at the B that minimizes Ptot, we can write
Note: optimum does not necessarily occur where Pfe = Pcu. Rather, it
occurs where
dPtot
d(∆B)
=
dPfe
d(∆B)
+
dPcu
d(∆B)
= 0
dPfe
d(∆B)
= –
dPcu
d(∆B)
8. Fundamentals of Power Electronics Chapter 15: Transformer design8
Take derivatives of core and copper loss
Now, substitute into and solve for B:
Optimum B for a
given core and
application
Pcu =
ρλ1
2
Itot
2
4Ku
(MLT)
WAAc
2
1
∆B
2
Pfe = K fe(∆B)β
Ac lm
dPfe
d(∆B)
= βK fe(∆B) β – 1
Aclm dPcu
d(∆B)
= – 2
ρλ1
2
Itot
2
4Ku
(MLT)
WAAc
2 (∆B)– 3
dPfe
d(∆B)
= –
dPcu
d(∆B)
∆B =
ρλ1
2
Itot
2
2Ku
(MLT)
WAAc
3
lm
1
βK fe
1
β + 2
9. Fundamentals of Power Electronics Chapter 15: Transformer design9
Total loss
Substitute optimum B into expressions for Pcu and Pfe. The total loss is:
Rearrange as follows:
Left side: terms depend on core
geometry
Right side: terms depend on
specifications of the application
Ptot = AclmK fe
2
β + 2
ρλ1
2
Itot
2
4Ku
(MLT)
WAAc
2
β
β + 2
β
2
–
β
β + 2
+
β
2
2
β + 2
WA Ac
2(β – 1)/β
(MLT)lm
2/β
β
2
–
β
β + 2
+
β
2
2
β + 2
–
β + 2
β
=
ρλ1
2
Itot
2
K fe
2/β
4Ku Ptot
β + 2 /β
10. Fundamentals of Power Electronics Chapter 15: Transformer design10
The core geometrical constant Kgfe
Define
Design procedure: select a core that satisfies
Appendix D lists the values of Kgfe for common ferrite cores
Kgfe is similar to the Kg geometrical constant used in Chapter 14:
• Kg is used when Bmax is specified
• Kgfe is used when B is to be chosen to minimize total loss
Kgfe =
WA Ac
2(β – 1)/β
(MLT)lm
2/β
β
2
–
β
β + 2
+
β
2
2
β + 2
–
β + 2
β
Kgfe ≥
ρλ1
2
Itot
2
K fe
2/β
4Ku Ptot
β + 2 /β
11. Fundamentals of Power Electronics Chapter 15: Transformer design11
15.2 Step-by-step
transformer design procedure
The following quantities are specified, using the units noted:
Wire effective resistivity ( -cm)
Total rms winding current, ref to pri Itot (A)
Desired turns ratios n2/n1, n3/n1, etc.
Applied pri volt-sec 1 (V-sec)
Allowed total power dissipation Ptot (W)
Winding fill factor Ku
Core loss exponent
Core loss coefficient Kfe (W/cm3T )
Other quantities and their dimensions:
Core cross-sectional area Ac (cm2)
Core window area WA (cm2)
Mean length per turn MLT (cm)
Magnetic path length le (cm)
Wire areas Aw1, … (cm2)
Peak ac flux density B (T)
12. Fundamentals of Power Electronics Chapter 15: Transformer design12
Procedure
1. Determine core size
Select a core from Appendix D that satisfies this inequality.
It may be possible to reduce the core size by choosing a core material
that has lower loss, i.e., lower Kfe.
Kgfe ≥
ρλ1
2
Itot
2
K fe
2/β
4Ku Ptot
β + 2 /β
108
13. Fundamentals of Power Electronics Chapter 15: Transformer design13
2. Evaluate peak ac flux density
At this point, one should check whether the saturation flux density is
exceeded. If the core operates with a flux dc bias Bdc, then B + Bdc
should be less than the saturation flux density Bsat.
If the core will saturate, then there are two choices:
• Specify B using the Kg method of Chapter 14, or
• Choose a core material having greater core loss, then repeat
steps 1 and 2
∆B = 108 ρλ1
2
Itot
2
2Ku
(MLT)
WAAc
3
lm
1
βK fe
1
β + 2
14. Fundamentals of Power Electronics Chapter 15: Transformer design14
3. and 4. Evaluate turns
Primary turns:
Choose secondary turns according to
desired turns ratios:
n2 = n1
n2
n1
n3 = n1
n3
n1
n1 =
λ1
2∆BAc
104
15. Fundamentals of Power Electronics Chapter 15: Transformer design15
5. and 6. Choose wire sizes
α1 =
n1I1
n1Itot
α2 =
n2I2
n1Itot
αk =
nkIk
n1Itot
Fraction of window area
assigned to each winding:
Choose wire sizes according
to:
Aw1 ≤
α1KuWA
n1
Aw2 ≤
α2KuWA
n2
16. Fundamentals of Power Electronics Chapter 15: Transformer design16
Check: computed transformer model
iM, pk =
λ1
2LM
R1 =
ρn1(MLT)
Aw1
R2 =
ρn2(MLT)
Aw2
Predicted magnetizing
inductance, referred to primary:
Peak magnetizing current:
Predicted winding resistances:
n1 : n2
: nk
R1 R2
Rk
i1(t) i2(t)
ik(t)
LM
iM(t)
LM =
µn1
2
Ac
lm
17. Fundamentals of Power Electronics Chapter 15: Transformer design17
15.4.1 Example 1: Single-output isolated
Cuk converter
100 W fs = 200 kHz
D = 0.5 n = 5
Ku = 0.5 Allow Ptot = 0.25 W
Use a ferrite pot core, with Magnetics Inc. P material. Loss
parameters at 200 kHz are
Kfe = 24.7 = 2.6
+
–
+
V
5 V
–
Vg
25 V
n : 1
I
20 A
Ig
4 A
+
v2(t)
–
–
v1(t)
+
i1(t) i2(t)
– vC2(t) ++ vC1(t) –
18. Fundamentals of Power Electronics Chapter 15: Transformer design18
Waveforms
v1(t)
i1(t)
i2(t)
DTs
Area λ1VC1
– nVC2
D'Ts
I/n
– Ig
I
– nIg
Applied primary volt-
seconds:
λ1 = DTsVc1 = (0.5) (5 µsec ) (25 V)
= 62.5 V–µsec
Applied primary rms
current:
I1 = D I
n
2
+ D' Ig
2
= 4 A
Applied secondary rms
current:
I2 = nI1 = 20 A
Total rms winding
current:
Itot = I1 + 1
n I2 = 8 A
19. Fundamentals of Power Electronics Chapter 15: Transformer design19
Choose core size
Kgfe ≥
(1.724⋅10– 6
)(62.5⋅10– 6
)2
(8)2
(24.7) 2/2.6
4 (0.5) (0.25) 4.6/2.6
108
= 0.00295
Pot core data of Appendix D lists 2213 pot core with
Kgfe = 0.0049
Next smaller pot core is not large enough.
20. Fundamentals of Power Electronics Chapter 15: Transformer design20
Evaluate peak ac flux density
This is much less than the saturation flux density of approximately
0.35 T. Values of B in the vicinity of 0.1 T are typical for ferrite
designs that operate at frequencies in the vicinity of 100 kHz.
∆B = 108 (1.724⋅10– 6
)(62.5⋅10– 6
)2
(8)2
2 (0.5)
(4.42)
(0.297)(0.635)3
(3.15)
1
(2.6)(24.7)
1/4.6
= 0.0858 Tesla
21. Fundamentals of Power Electronics Chapter 15: Transformer design21
Evaluate turns
n1 = 104 (62.5⋅10– 6
)
2(0.0858)(0.635)
= 5.74 turns
n2 =
n1
n = 1.15 turns
In practice, we might select
n1 = 5 and n2 = 1
This would lead to a slightly higher flux density and slightly higher
loss.
22. Fundamentals of Power Electronics Chapter 15: Transformer design22
Determine wire sizes
Fraction of window area allocated to each winding:
α1 =
4 A
8 A
= 0.5
α2 =
1
5 20 A
8 A
= 0.5
(Since, in this example, the ratio of
winding rms currents is equal to the
turns ratio, equal areas are
allocated to each winding)
Wire areas:
Aw1 =
(0.5)(0.5)(0.297)
(5)
= 14.8⋅10– 3
cm2
Aw2 =
(0.5)(0.5)(0.297)
(1)
= 74.2⋅10– 3
cm2
From wire table,
Appendix D:
AWG #16
AWG #9
23. Fundamentals of Power Electronics Chapter 15: Transformer design23
Wire sizes: discussion
Primary
5 turns #16 AWG
Secondary
1 turn #9 AWG
• Very large conductors!
• One turn of #9 AWG is not a practical solution
Some alternatives
• Use foil windings
• Use Litz wire or parallel strands of wire
24. Fundamentals of Power Electronics Chapter 15: Transformer design24
Effect of switching frequency on transformer size
for this P-material Cuk converter example
0
0.02
0.04
0.06
0.08
0.1
Switching frequency
Bmax,Tesla
Potcoresize
4226
3622
2616
2213
1811 1811
2213
2616
25 kHz 50 kHz 100 kHz 200 kHz 250 kHz 400 kHz 500 kHz 1000 kHz
• As switching frequency is
increased from 25 kHz to
250 kHz, core size is
dramatically reduced
• As switching frequency is
increased from 400 kHz to
1 MHz, core size
increases
25. Fundamentals of Power Electronics Chapter 15: Transformer design25
15.3.2 Example 2
Multiple-Output Full-Bridge Buck Converter
Switching frequency 150 kHz
Transformer frequency 75 kHz
Turns ratio 110:5:15
Optimize transformer at D = 0.75
: n2
+
v1(t)
–
+
–
D1
Q1
D2Q2
D3
Q3
D4Q4
i1(t)
+
5 V
–
D5
D6
I5V
100 Ai2a(t)
+
15 V
–
D7
D8
i3a(t)
n1 :
: n2
: n3
: n3
i2b(t)
i2b(t)
I15V
15 A
T1
Vg
160 V
26. Fundamentals of Power Electronics Chapter 15: Transformer design26
Other transformer design details
Use Magnetics, Inc. ferrite P material. Loss parameters at 75 kHz:
Kfe = 7.6 W/T cm3
= 2.6
Use E-E core shape
Assume fill factor of
Ku = 0.25 (reduced fill factor accounts for added insulation required
in multiple-output off-line application)
Allow transformer total power loss of
Ptot = 4 W (approximately 0.5% of total output power)
Use copper wire, with
= 1.724·10–6 -cm
29. Fundamentals of Power Electronics Chapter 15: Transformer design29
Applied primary rms current
i1(t)
0
n2
n1
I5V +
n3
n1
I15V
–
n2
n1
I5V +
n3
n1
I15V
I1 =
n2
n1
I5V +
n3
n1
I15V D = 5.7 A
30. Fundamentals of Power Electronics Chapter 15: Transformer design30
Applied rms current, secondary windings
t
i2a(t)
0
i3a(t)
0 DTs Ts 2TsTs+DTs
I5V
0.5I5V
I15V
0.5I15V
0
I3 = 1
2 I15V 1 + D = 9.9 A
I2 = 1
2 I5V 1 + D = 66.1 A
31. Fundamentals of Power Electronics Chapter 15: Transformer design31
Itot
RMS currents, summed over all windings and referred to primary
Itot =
nj
n1
IjΣall 5
windings
= I1 + 2
n2
n1
I2 + 2
n3
n1
I3
= 5.7 A + 5
110
66.1 A + 15
110
9.9 A
= 14.4 A
32. Fundamentals of Power Electronics Chapter 15: Transformer design32
Select core size
Kgfe ≥
(1.724⋅10– 6
)(800⋅10– 6
)2
(14.4)2
(7.6) 2/2.6
4 (0.25) (4) 4.6/2.6
108
= 0.00937
A
From Appendix D
33. Fundamentals of Power Electronics Chapter 15: Transformer design33
Evaluate ac flux density B
Bmax = 108 ρλ1
2
Itot
2
2Ku
(MLT)
WAAc
3
lm
1
βK fe
1
β + 2
Eq. (15.20):
Plug in values:
This is less than the saturation flux density of approximately 0.35 T
∆B = 108 (1.724⋅10– 6
)(800⋅10– 6
)2
(14.4)2
2(0.25)
(8.5)
(1.1)(1.27)3
(7.7)
1
(2.6)(7.6)
1/4.6
= 0.23 Tesla
34. Fundamentals of Power Electronics Chapter 15: Transformer design34
Evaluate turns
Choose n1 according to Eq. (15.21):
n1 = 104 (800⋅10– 6
)
2(0.23)(1.27)
= 13.7 turns
Choose secondary turns
according to desired turns ratios:
n2 =
5
110
n1 = 0.62 turns
n3 =
15
110
n1 = 1.87 turns
Rounding the number of turns
To obtain desired turns ratio
of
110:5:15
we might round the actual
turns to
22:1:3
Increased n1 would lead to
• Less core loss
• More copper loss
• Increased total loss
n1 =
λ1
2∆BAc
104
35. Fundamentals of Power Electronics Chapter 15: Transformer design35
Loss calculation
with rounded turns
With n1 = 22, the flux density will be reduced to
The resulting losses will be
Pfe = (7.6)(0.143)2.6
(1.27)(7.7) = 0.47 W
Pcu =
(1.724⋅10– 6
)(800⋅10– 6
)2
(14.4)2
4 (0.25)
(8.5)
(1.1)(1.27)2
1
(0.143)2 108
= 5.4 W
Ptot = Pfe + Pcu = 5.9 W
Which exceeds design goal of 4 W by 50%. So use next larger core
size: EE50.
∆B =
(800⋅10– 6
)
2(22)(1.27)
104
= 0.143 Tesla
36. Fundamentals of Power Electronics Chapter 15: Transformer design36
Calculations with EE50
Repeat previous calculations for EE50 core size. Results:
B = 0.14 T, n1 = 12, Ptot = 2.3 W
Again round n1 to 22. Then
B = 0.08 T, Pcu = 3.89 W, Pfe = 0.23 W, Ptot = 4.12 W
Which is close enough to 4 W.
38. Fundamentals of Power Electronics Chapter 15: Transformer design38
Discussion: Transformer design
• Process is iterative because of round-off of physical number of
turns and, to a lesser extent, other quantities
• Effect of proximity loss
– Not included in design process yet
– Requires additional iterations
• Can modify procedure as follows:
– After a design has been calculated, determine number of layers in
each winding and then compute proximity loss
– Alter effective resistivity of wire to compensate: define
eff = Pcu/Pdc where Pcu is the total copper loss (including proximity
effects) and Pdc is the copper loss predicted by the dc resistance.
– Apply transformer design procedure using this effective wire
resistivity, and compute proximity loss in the resulting design.
Further iterations may be necessary if the specifications are not
met.
39. Fundamentals of Power Electronics Chapter 15: Transformer design39
15.4 AC Inductor Design
+
v(t)
–
L
i(t) Core
Window area WA
Core mean length
per turn (MLT)
Wire resistivity ρ
Fill factor Ku
Air gap
lg
n
turns
Core area
Ac
Area λ
v(t)
t1 t2 t
i(t)
Design a single-winding inductor, having
an air gap, accounting for core loss
(note that the previous design procedure of
this chapter did not employ an air gap, and
inductance was not a specification)
40. Fundamentals of Power Electronics Chapter 15: Transformer design40
Outline of key equations
L =
µ0Acn2
lg
∆B = λ
2nAc
Obtain specified inductance:
Relationship between
applied volt-seconds and
peak ac flux density:
Pcu =
ρn2(MLT)
KuWA
I2
Copper loss (using dc
resistance):
∆B =
ρλ2
I2
2Ku
(MLT)
WAAc
3
lm
1
βK fe
1
β + 2
Total loss is minimized when
Kgfe ≥
ρλ2
I2
K fe
2/β
2Ku Ptot
β + 2 /β
Must select core that satisfies
See Section 15.4.2 for step-by-step
design equations