kiran edited

Kiran Balu K
+919847927328
balukiran2008@gmail.com
Academic Background
COURSE INSTITUTION (UNIVERSITY) YEAR AGGREGATE
M.Tech
(VLSI and Embedded System)
B.Tech
(Electronics and Communication)
Class XII
Class X
Technical Skills
Mangalam engineering college
(Mahatma gandhi university, India)
Al- Ameen college of engineering
(Calicut university, India))
Bharathamatha HSS, Palakkad
(Kerala state board of secondary education, India)
Bharathamatha HSS, Palakkad
(Kerala state board of secondary education, India)
2014-2016 pursuing
( 7.9 CGPA )
2013 7.67 CGPA
2009 92%
2007 90%
Languages Known: C,C++,Assembly programming languages 8051,8085,Hardware Description Language – VHDL, Verilog, ARM
Operating System: Windows, Ubuntu
Developer Tools: Pspice, Cadence Virtuoso Spectre circuit simulator , Xilinx ISE, Microcontroller 8051 IDE
Subjects of Interest: Analog and Digital VLSI design, FPGA design using VHDL & Verilog
Academic Projects
● IMPLEMENTATION OF POWER AND AREA EFFICIENT ALU USING GDI TECHNIQUE (MTECH : MAIN PROJECT)
 Project done at Mangalam college of engineering, India.
 ALU with area and power efficient at transistor level using GDI.
 Gate diffusion input (GDI) technique uses a GDI cell consists of only 2 transistors for implementing circuits .Even a MUX
required 1 GDI cell consisting of 2 transistors compared to CMOS which require 6 transistors. Efficient technique Compared to
CMOS, PTL in terms of number of transistors and power consumption. Simulation done using cadence and implementation in
Spartan 3E FPGA
● FMO/MANCHESTER ENCODER USING SOLS TECHNIQUE FOR DSRC APPLICATIONS(MTECH : MINI PROJECT)
 Project done at Mangalam college of engineering, India.
 Design of an area and power efficient encoder.
 Dedicated short range communication(DSRC) is a standard for communication between vehicles in order to avoid collisions
and accidents. Data transmitted between vehicles are encoded using FMO or Manchester encoding techniques.Implementing
both FMO and Manchester encoder in a single unit leads to more complicated circuit. Using Similarity orientated logic
simplification technique(SOLS),circuit is simplified with minimum number of blocks to achieve 100% hardware utilization
rate(HUR). Simulation done in Xilinx ISE 13.2 using Verilog language.

● DROWSY DRIVER DETECTION SYSTEM (BTECH: MAIN PROJECT)
 Project done at KELTRON Aroor, Alleppey.
 Efficient system to reduce accidents due to sleepiness or alcoholic consumption .
 Using IR transceiver mounted at spectacles, the blinking of eyes is observed. Whenever eyes are closed for more an a
threshold seconds IR rays are blocked there by activating alarm signal. Also setup for turning off the engine when ever driver
consumed alcohol. High reliability compared to existing methods.Hardware implemented in PIC 16F877A.
Academic Seminars
 SEMINAR ON “EMBEDDED TRANSITION INVERSION CODING(ETIC)” (MTECH : SEMINAR)
 Seminar Work done at Mangalam College of engineering.
 An encoding technique to reduce switching activity and dynamic power dissipation in digital circuits.
 ETIC will check number of transitions of logic inputs. If it is greater than threshold value then it will encode ‘0’ to ‘1’ and ‘1’
to ‘0’ transition as ‘0’ to ‘0’ and ‘1’ to ‘1’ by inverting second bit to reduce switching. Simulation done in Xilinx ISE 13.2 using
Verilog .
 SEMINAR ON “FUTURE IRRIGATION” (BTECH : SEMINAR)
 Seminar Work done at Al-Ameen College of engineering.
 Irrigation based on hybrid solar and wind energy with GSM technology.
 Water pumps uses solar & wind energy. Solar panels have sensors to detect intensity of sunlight and can move according to
sunlight direction. Uses sensors to detect moisture content in farm. Farmer can control water pumps using GSM module.
Areas of interest
 Analog and Digital VLSI design of DRAM, Analog to digital converters.
 FPGA design using VHDL & Verilog.
Awards and Achievements
 Participated in “Faculty development program(FDP) on interdisciplinary research methodology”, at Mangalam engineering
college, July 2015.
 National conference on recent Advances in VLSI design, February 2016
Positions of Responsibility
 MTECH representative to the college Senate.
 Volunteer of Faculty Development Programme on “Interdisciplinary research methodology, Mangalam engineering college ,
July 2015.
 Volunteer of Women Empowerment programme “E-Smart 2K15”, Mangalam engineering college, November 2015.
 Volunteer of Faculty Development Programme On “Graphical System Design (LabVIEW) in Engineering Applications”,
Mangalam engineering college, December 2015.

Personal Details
Name: KIRAN BALU K
Father's Name: BALAKRISHNAN K V
Mother's Name: C S JAYALALITHA
Sex: Male
Date of Birth: July 5 ,1991
Languages Known: English, Hindi, Malayalam
Hobbies: Reading, playing badminton,
surfing internet
Reference
♣ Prof Asha Panickar, HOD, Electronics and Communication Engineering, Mangalam College of Engineering and
Technology, Ettumanoor
♣ Prof Venugopalan K, HOD, Electronics and Communication Engineering, Al- Ameen Engineering College, Palakkad
Address: Kollannirapel House, Chethicode P.O Kanjiramattom,Ernakulam, Kerala, India-682315

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