ๅฐŠๆ•ฌ็š„ ๅพฎไฟกๆฑ‡็Ž‡๏ผš1ๅ†† โ‰ˆ 0.046166 ๅ…ƒ ๆ”ฏไป˜ๅฎๆฑ‡็Ž‡๏ผš1ๅ†† โ‰ˆ 0.046257ๅ…ƒ [้€€ๅ‡บ็™ปๅฝ•]
SlideShare a Scribd company logo
PROJECTBASED LAB REPORT
On
DESIGN OF 4-BIT
LINEAR FEEDBACK SHIFT REGISTER
By E.Nandnaa Priyanka
CONTENTS
1. Introduction
2. Circuit diagram
3. Principle
4. Circuit design components
5. Working
6. Applications
7. Conclusion
8. Reference
Introduction:
A linear feedback shifts register (LFSR) is the shift register including input bit which is the
direct operation of its old block. The unique direct operation of single bits is XOR and hence
this is the shift register in which input bit is operated through the exclusive-OR (XOR) of few
of the bits of the complete the value of shift register.
The LFSR starting value is known as the seed since the function of the register is evaluated
and the flow of values generated through the register is entirely evaluated through its present
place. In the similar way, the register includes the finite amount of possible places and it should
have the repeating forms. Nevertheless, the LFSR including well-chosen feedback operation is
able to generate the series of bits that looks random that includes lengthy cycle.
The n-bit LFSR is the length of n-bit shift register including feedback and input. The feedback
is resulted from XORing or XNORing which is the result of chosen levels of the shift register
which is defined like โ€˜tapsโ€™. Every level includes general clock. The โ€˜linearโ€™ portion of the
โ€˜LFSRโ€™ is referred from the XOR and XNOR which are linear operations.
LFSRs are used under hardware and it is beneficial under applications which need very quick
process of the pseudo-random series like direct-series spectrum radio. LFSRs are utilized to
produce the closeness of white noise under many executable sound producers. The Global
Positioning System makes use of LFSR to quickly shift the series which shows high-precision
respective time offsets.
CIRCUIT DIAGRAM:
PRINCIPLE:
A pseudorandom number generator is an algorithm for generating sequence of numbers whose
properties approximate the properties of sequence of random numbers. The PRNG generated
sequence is not truly random because it is completely determining by a relative set of intial
values.
So, it helps us to send a secret message to the receivers in a coded form. The receiver decodes
the code sent in order to receive the message hidden in it.
CIRCUIT DIAGRAM COMPONENTS:
D-FLIP FLOPS:
The D Flip Flop is by far the most important of the clocked flip-flops as it ensures that ensures
that inputs S and R are never equal to one at the same time. The D-type flip flop is constructed
from a gated SR flip-flop with an inverter added between the S and the R inputs to allow for a
single D (data) input.
XOR GATE:
An XOR gate (sometimes referred to by its extended name, Exclusive OR gate) is a digital
logic gate with two or more inputs and one output that performs exclusive disjunction. The
output of an XOR gate is true only when exactly one of its inputs is true. If both of an XOR
gate's inputs are false, or if both of its inputs are true, then the output of the XOR gate is false.
CLOCK:
In electronics and especially synchronous digital circuits, a clock signal is a particular type
of signal that oscillates between a high and a low state and is utilized like a metronome to
coordinate actions of digital circuits.
WORKING:
๏‚ท Initially the code is given to the D-Flip Flop, say โ€˜1000โ€™.
๏‚ท The last two digits undergo XOR using the truth table:
here, โ€˜0 0โ€™ undergo XOR: out=0.
๏‚ท The Resulted value shifts to left to starting and the first 3 digits shifts right.
RESULT:
๏‚ท Similarly, the process continues till we get the same code โ€˜1000โ€™.
๏‚ท It is observed that, it takes 15 cycles to come back to the same code entered initially.
๏‚ท This generally works with clock pulse, the XOR is applied to last to 2 digits when the
clock pulse is given.
๏‚ท For every clock pulse the code is left shifted undergoing XOR operation.
1 0 0 0
0 1 0 0
APPLICATIONS:
LFSRs can be implemented in hardware, and this makes them useful in applications that require
very fast generation of a pseudo-random sequence, such as direct-sequence spread spectrum
radio. LFSRs have also been used for generating an approximation of white noise in various
programmable sound generators. The Global Positioning System uses an LFSR to rapidly
transmit a sequence that indicates high-precision relative time offsets.
Uses as counters:
The repeating sequence of states of an LFSR allows it to be used as a clock divider, or as a
counter when a non-binary sequence is acceptable as is often the case where computer index
or framing locations need to be machine-readable. LFSR counters have simpler feedback logic
than natural binary counters or Gray code counters, and therefore can operate at higher clock
rates. However, it is necessary to ensure that the LFSR never enters an all-zeros state, for
example by pre-setting it at start-up to any other state in the sequence.
Uses in cryptography:
LFSRs have long been used as pseudo-random number generators for use in stream ciphers
(especially in military cryptography), due to the ease of construction from simple electro-
mechanical or electronic circuits, long periods, and very uniformly distributed output streams.
However, an LFSR is a linear system, leading to fairly easy cryptanalysis. For example, given
a stretch of known plaintext and corresponding cipher text, an attacker can intercept and
recover a stretch of LFSR output stream used in the system described, and from that stretch of
the output stream can construct an LFSR of minimal size that simulates the intended receiver.
This LFSR can then be fed the intercepted stretch of output stream to recover the remaining
plaintext.
Three general methods are employed to reduce this problem in LFSR-based stream ciphers:
Non-linear combination of several bits from the LFSR state.
Non-linear combination of the output bits of two or more LFSRs.
Irregular clocking of the LFSR, as in the alternating step generator.
Uses in digital broadcasting and communications:
To prevent short repeating sequences (e.g., runs of 0's or 1's) from forming spectral lines that
may complicate symbol tracking at the receiver or interfere with other transmissions, linear
feedback registers are often used to "randomize" the transmitted bit stream. This randomization
is removed at the receiver after demodulation. When the LFSR runs at the same rate as the
transmitted symbol stream, this technique is referred to as scrambling. When the LFSR runs
considerably faster than the symbol stream, expanding the bandwidth of the transmitted signal,
this is direct-sequence spread spectrum.
Digital broadcasting systems that use linear feedback registers:
๏‚ท ATSC Standards (digital TV transmission system โ€“ North America)
๏‚ท DAB (Digital Audio Broadcasting system โ€“ for radio)
๏‚ท DVB-T (digital TV transmission system โ€“ Europe, Australia, parts of Asia)
๏‚ท NICAM (digital audio system for television)
Other digital communications systems using LFSRs:
๏‚ท IBS (INTELSAT business service)
๏‚ท IDR (Intermediate Data Rate service)
๏‚ท SDI (Serial Digital Interface transmission)
๏‚ท Data transfer over PSTN (according to the ITU-T V-series recommendations)
๏‚ท CDMA (Code Division Multiple Access) cellular telephony
๏‚ท 100BASE-T2 "fast" Ethernet scrambles bits using an LFSR
๏‚ท 1000BASE-T Ethernet, the most common form of Gigabit Ethernet, scrambles bits
using an LFSR
๏‚ท PCI Express 3.0
๏‚ท USB 3.0
๏‚ท IEEE 802.11a scrambles bits using an LFSR
STIMULATION:
CONCLUSION:
Linear Feedback Shift Register (LFSR) Project is concluded that LFSRs is utilized like the
pseudo-random number producers to be utilized under stream ciphers particularly under
military cryptography because of the ease of building from electronic circuits or electro-
mechanical.
REFERENCE:
1)www.wikipedia.in
2)www.google.com
3)www.quora.aom

More Related Content

What's hot

VLSI Testing Techniques
VLSI Testing TechniquesVLSI Testing Techniques
VLSI Testing Techniques
A B Shinde
ย 
Synchronous and asynchronous clock
Synchronous and asynchronous clockSynchronous and asynchronous clock
Synchronous and asynchronous clock
Nallapati Anindra
ย 
06. thumb instructions
06. thumb instructions06. thumb instructions
06. thumb instructions
balaji raja rajan Venkatachalam
ย 
Addressing modes of 8051
Addressing modes of 8051Addressing modes of 8051
Addressing modes of 8051
SARITHA REDDY
ย 
RTL-Design for beginners
RTL-Design  for beginnersRTL-Design  for beginners
RTL-Design for beginners
Dr.YNM
ย 
8251 USART
8251 USART8251 USART
8251 USART
ShivamSood22
ย 
Assembly language programming_fundamentals 8086
Assembly language programming_fundamentals 8086Assembly language programming_fundamentals 8086
Assembly language programming_fundamentals 8086
Shehrevar Davierwala
ย 
Presentation on 8086 Microprocessor
Presentation  on   8086 MicroprocessorPresentation  on   8086 Microprocessor
Presentation on 8086 Microprocessor
Nahian Ahmed
ย 
Interrupts in 8051
Interrupts in 8051Interrupts in 8051
Interrupts in 8051
Sudhanshu Janwadkar
ย 
Ch12 microprocessor interrupts
Ch12 microprocessor interruptsCh12 microprocessor interrupts
Ch12 microprocessor interrupts
University of Technology - Iraq
ย 
CPU Architecture - Basic
CPU Architecture - BasicCPU Architecture - Basic
CPU Architecture - Basic
Yong Heui Cho
ย 
INTERRUPTS OF 8086 MICROPROCESSOR
INTERRUPTS OF 8086 MICROPROCESSORINTERRUPTS OF 8086 MICROPROCESSOR
INTERRUPTS OF 8086 MICROPROCESSOR
Gurudev joshi
ย 
Divide by N clock
Divide by N clockDivide by N clock
Divide by N clock
Mantra VLSI
ย 
Control unit design
Control unit designControl unit design
Control unit design
Dhaval Bagal
ย 
8085 microprocessor
8085 microprocessor8085 microprocessor
8085 microprocessor
Apar Pramod
ย 
Booth Multiplier
Booth MultiplierBooth Multiplier
Booth Multiplier
Sudhir Kumar
ย 
8051 Addressing Modes
8051 Addressing Modes8051 Addressing Modes
8051 Addressing Modes
Senthil Kumar
ย 
Implementation strategies for digital ics
Implementation strategies for digital icsImplementation strategies for digital ics
Implementation strategies for digital ics
aroosa khan
ย 
Advance Peripheral Bus
Advance Peripheral Bus Advance Peripheral Bus
Advance Peripheral Bus
SIVA NAGENDRA REDDY
ย 
Complex Programmable Logic Device (CPLD) Architecture and Its Applications
Complex Programmable Logic Device (CPLD) Architecture and Its ApplicationsComplex Programmable Logic Device (CPLD) Architecture and Its Applications
Complex Programmable Logic Device (CPLD) Architecture and Its Applications
elprocus
ย 

What's hot (20)

VLSI Testing Techniques
VLSI Testing TechniquesVLSI Testing Techniques
VLSI Testing Techniques
ย 
Synchronous and asynchronous clock
Synchronous and asynchronous clockSynchronous and asynchronous clock
Synchronous and asynchronous clock
ย 
06. thumb instructions
06. thumb instructions06. thumb instructions
06. thumb instructions
ย 
Addressing modes of 8051
Addressing modes of 8051Addressing modes of 8051
Addressing modes of 8051
ย 
RTL-Design for beginners
RTL-Design  for beginnersRTL-Design  for beginners
RTL-Design for beginners
ย 
8251 USART
8251 USART8251 USART
8251 USART
ย 
Assembly language programming_fundamentals 8086
Assembly language programming_fundamentals 8086Assembly language programming_fundamentals 8086
Assembly language programming_fundamentals 8086
ย 
Presentation on 8086 Microprocessor
Presentation  on   8086 MicroprocessorPresentation  on   8086 Microprocessor
Presentation on 8086 Microprocessor
ย 
Interrupts in 8051
Interrupts in 8051Interrupts in 8051
Interrupts in 8051
ย 
Ch12 microprocessor interrupts
Ch12 microprocessor interruptsCh12 microprocessor interrupts
Ch12 microprocessor interrupts
ย 
CPU Architecture - Basic
CPU Architecture - BasicCPU Architecture - Basic
CPU Architecture - Basic
ย 
INTERRUPTS OF 8086 MICROPROCESSOR
INTERRUPTS OF 8086 MICROPROCESSORINTERRUPTS OF 8086 MICROPROCESSOR
INTERRUPTS OF 8086 MICROPROCESSOR
ย 
Divide by N clock
Divide by N clockDivide by N clock
Divide by N clock
ย 
Control unit design
Control unit designControl unit design
Control unit design
ย 
8085 microprocessor
8085 microprocessor8085 microprocessor
8085 microprocessor
ย 
Booth Multiplier
Booth MultiplierBooth Multiplier
Booth Multiplier
ย 
8051 Addressing Modes
8051 Addressing Modes8051 Addressing Modes
8051 Addressing Modes
ย 
Implementation strategies for digital ics
Implementation strategies for digital icsImplementation strategies for digital ics
Implementation strategies for digital ics
ย 
Advance Peripheral Bus
Advance Peripheral Bus Advance Peripheral Bus
Advance Peripheral Bus
ย 
Complex Programmable Logic Device (CPLD) Architecture and Its Applications
Complex Programmable Logic Device (CPLD) Architecture and Its ApplicationsComplex Programmable Logic Device (CPLD) Architecture and Its Applications
Complex Programmable Logic Device (CPLD) Architecture and Its Applications
ย 

Viewers also liked

Pseudo Random Bit Sequence Generator
Pseudo Random Bit Sequence Generator Pseudo Random Bit Sequence Generator
Pseudo Random Bit Sequence Generator
ajay singh
ย 
Project lfsr
Project lfsrProject lfsr
Project lfsr
Harsha Yelisala
ย 
Shift Registers
Shift RegistersShift Registers
Shift Registers
Abhilash Nair
ย 
Integrated Circuit
Integrated CircuitIntegrated Circuit
Integrated Circuit
Neeraj sharma
ย 
Programmable PN Sequence Generators
Programmable PN Sequence GeneratorsProgrammable PN Sequence Generators
Programmable PN Sequence Generators
Rajesh Singh
ย 
M.TECH, ECE 2nd SEM LAB RECORD
M.TECH, ECE 2nd SEM LAB RECORD M.TECH, ECE 2nd SEM LAB RECORD
M.TECH, ECE 2nd SEM LAB RECORD
Arif Ahmed
ย 
EEL316: Pseudo Random Bit Generation
EEL316: Pseudo Random Bit GenerationEEL316: Pseudo Random Bit Generation
EEL316: Pseudo Random Bit Generation
Umang Gupta
ย 
Overview of Shift register and applications
Overview of Shift register and applicationsOverview of Shift register and applications
Overview of Shift register and applications
Karthik Kumar
ย 
Shift registers
Shift registersShift registers
Shift registers
Ravi Maurya
ย 
Flipflop
FlipflopFlipflop
Flipflop
sohamdodia27
ย 
Chapter 4 flip flop for students
Chapter 4 flip flop for studentsChapter 4 flip flop for students
Chapter 4 flip flop for students
CT Sabariah Salihin
ย 

Viewers also liked (11)

Pseudo Random Bit Sequence Generator
Pseudo Random Bit Sequence Generator Pseudo Random Bit Sequence Generator
Pseudo Random Bit Sequence Generator
ย 
Project lfsr
Project lfsrProject lfsr
Project lfsr
ย 
Shift Registers
Shift RegistersShift Registers
Shift Registers
ย 
Integrated Circuit
Integrated CircuitIntegrated Circuit
Integrated Circuit
ย 
Programmable PN Sequence Generators
Programmable PN Sequence GeneratorsProgrammable PN Sequence Generators
Programmable PN Sequence Generators
ย 
M.TECH, ECE 2nd SEM LAB RECORD
M.TECH, ECE 2nd SEM LAB RECORD M.TECH, ECE 2nd SEM LAB RECORD
M.TECH, ECE 2nd SEM LAB RECORD
ย 
EEL316: Pseudo Random Bit Generation
EEL316: Pseudo Random Bit GenerationEEL316: Pseudo Random Bit Generation
EEL316: Pseudo Random Bit Generation
ย 
Overview of Shift register and applications
Overview of Shift register and applicationsOverview of Shift register and applications
Overview of Shift register and applications
ย 
Shift registers
Shift registersShift registers
Shift registers
ย 
Flipflop
FlipflopFlipflop
Flipflop
ย 
Chapter 4 flip flop for students
Chapter 4 flip flop for studentsChapter 4 flip flop for students
Chapter 4 flip flop for students
ย 

Similar to Lfsr report

[IJET V2I3P1] Authors: G Hemanth kumar Dr. M. Saravanan, Charan kumar. K
[IJET V2I3P1] Authors: G Hemanth kumar Dr. M. Saravanan, Charan kumar. K[IJET V2I3P1] Authors: G Hemanth kumar Dr. M. Saravanan, Charan kumar. K
[IJET V2I3P1] Authors: G Hemanth kumar Dr. M. Saravanan, Charan kumar. K
IJET - International Journal of Engineering and Techniques
ย 
CRYPTO Module 05.in.pdf
CRYPTO Module 05.in.pdfCRYPTO Module 05.in.pdf
CRYPTO Module 05.in.pdf
AnushaS405812
ย 
Vlsi implementation ofdm
Vlsi implementation ofdmVlsi implementation ofdm
Vlsi implementation ofdm
Manas Verma
ย 
Lecture intro to_wcdma
Lecture intro to_wcdmaLecture intro to_wcdma
Lecture intro to_wcdma
Gurpreet Singh
ย 
Design of Counter Using SRAM
Design of Counter Using SRAMDesign of Counter Using SRAM
Design of Counter Using SRAM
IOSRJECE
ย 
Module 5 Pseudo Random Sequence(SEE NOW).pptx
Module 5 Pseudo Random Sequence(SEE NOW).pptxModule 5 Pseudo Random Sequence(SEE NOW).pptx
Module 5 Pseudo Random Sequence(SEE NOW).pptx
AdityaAnand843311
ย 
P0460699102
P0460699102P0460699102
P0460699102
IJERA Editor
ย 
Ofdm.pptx
Ofdm.pptxOfdm.pptx
Ofdm.pptx
Akbarali206563
ย 
International Journal of Engineering Research and Development (IJERD)
International Journal of Engineering Research and Development (IJERD)International Journal of Engineering Research and Development (IJERD)
International Journal of Engineering Research and Development (IJERD)
IJERD Editor
ย 
Reconfigurable linear feedback shift register for wireless communication and...
Reconfigurable linear feedback shift register for wireless  communication and...Reconfigurable linear feedback shift register for wireless  communication and...
Reconfigurable linear feedback shift register for wireless communication and...
International Journal of Reconfigurable and Embedded Systems
ย 
Achieving Reduced Area and Power with Multi Bit Flip-Flop When Implemented In...
Achieving Reduced Area and Power with Multi Bit Flip-Flop When Implemented In...Achieving Reduced Area and Power with Multi Bit Flip-Flop When Implemented In...
Achieving Reduced Area and Power with Multi Bit Flip-Flop When Implemented In...
IJERA Editor
ย 
LORA.pptx
LORA.pptxLORA.pptx
LORA.pptx
amyray28
ย 
Implementation of UART with Status Register using Multi Bit Flip-Flop
Implementation of UART with Status Register using Multi Bit  Flip-FlopImplementation of UART with Status Register using Multi Bit  Flip-Flop
Implementation of UART with Status Register using Multi Bit Flip-Flop
IJMER
ย 
VoCoRoBo: Remote Speech Recognition and Tilt Sensing Multi-Robotic System
VoCoRoBo: Remote Speech Recognition and Tilt Sensing Multi-Robotic SystemVoCoRoBo: Remote Speech Recognition and Tilt Sensing Multi-Robotic System
VoCoRoBo: Remote Speech Recognition and Tilt Sensing Multi-Robotic System
Sagun Man Singh Shrestha
ย 
Introduction to spred spectrum and CDMA
Introduction to spred spectrum and CDMAIntroduction to spred spectrum and CDMA
Introduction to spred spectrum and CDMA
Bidhan Ghimire
ย 
Implementation of UART with BIST Technique Using Low Power LFSR
Implementation of UART with BIST Technique Using Low Power LFSRImplementation of UART with BIST Technique Using Low Power LFSR
Implementation of UART with BIST Technique Using Low Power LFSR
IJERA Editor
ย 
frogcelsat
frogcelsatfrogcelsat
frogcelsat
Vasvi Gupta
ย 
Fsk modulation and demodulation
Fsk modulation and demodulationFsk modulation and demodulation
Fsk modulation and demodulation
Mafaz Ahmed
ย 
AREA OPTIMIZED FPGA IMPLEMENTATION FOR GENERATION OF RADAR PULSE COM-PRESSION...
AREA OPTIMIZED FPGA IMPLEMENTATION FOR GENERATION OF RADAR PULSE COM-PRESSION...AREA OPTIMIZED FPGA IMPLEMENTATION FOR GENERATION OF RADAR PULSE COM-PRESSION...
AREA OPTIMIZED FPGA IMPLEMENTATION FOR GENERATION OF RADAR PULSE COM-PRESSION...
VLSICS Design
ย 
Implementation of XOR Based Pad Generation Mutual Authentication Protocol for...
Implementation of XOR Based Pad Generation Mutual Authentication Protocol for...Implementation of XOR Based Pad Generation Mutual Authentication Protocol for...
Implementation of XOR Based Pad Generation Mutual Authentication Protocol for...
IOSR Journals
ย 

Similar to Lfsr report (20)

[IJET V2I3P1] Authors: G Hemanth kumar Dr. M. Saravanan, Charan kumar. K
[IJET V2I3P1] Authors: G Hemanth kumar Dr. M. Saravanan, Charan kumar. K[IJET V2I3P1] Authors: G Hemanth kumar Dr. M. Saravanan, Charan kumar. K
[IJET V2I3P1] Authors: G Hemanth kumar Dr. M. Saravanan, Charan kumar. K
ย 
CRYPTO Module 05.in.pdf
CRYPTO Module 05.in.pdfCRYPTO Module 05.in.pdf
CRYPTO Module 05.in.pdf
ย 
Vlsi implementation ofdm
Vlsi implementation ofdmVlsi implementation ofdm
Vlsi implementation ofdm
ย 
Lecture intro to_wcdma
Lecture intro to_wcdmaLecture intro to_wcdma
Lecture intro to_wcdma
ย 
Design of Counter Using SRAM
Design of Counter Using SRAMDesign of Counter Using SRAM
Design of Counter Using SRAM
ย 
Module 5 Pseudo Random Sequence(SEE NOW).pptx
Module 5 Pseudo Random Sequence(SEE NOW).pptxModule 5 Pseudo Random Sequence(SEE NOW).pptx
Module 5 Pseudo Random Sequence(SEE NOW).pptx
ย 
P0460699102
P0460699102P0460699102
P0460699102
ย 
Ofdm.pptx
Ofdm.pptxOfdm.pptx
Ofdm.pptx
ย 
International Journal of Engineering Research and Development (IJERD)
International Journal of Engineering Research and Development (IJERD)International Journal of Engineering Research and Development (IJERD)
International Journal of Engineering Research and Development (IJERD)
ย 
Reconfigurable linear feedback shift register for wireless communication and...
Reconfigurable linear feedback shift register for wireless  communication and...Reconfigurable linear feedback shift register for wireless  communication and...
Reconfigurable linear feedback shift register for wireless communication and...
ย 
Achieving Reduced Area and Power with Multi Bit Flip-Flop When Implemented In...
Achieving Reduced Area and Power with Multi Bit Flip-Flop When Implemented In...Achieving Reduced Area and Power with Multi Bit Flip-Flop When Implemented In...
Achieving Reduced Area and Power with Multi Bit Flip-Flop When Implemented In...
ย 
LORA.pptx
LORA.pptxLORA.pptx
LORA.pptx
ย 
Implementation of UART with Status Register using Multi Bit Flip-Flop
Implementation of UART with Status Register using Multi Bit  Flip-FlopImplementation of UART with Status Register using Multi Bit  Flip-Flop
Implementation of UART with Status Register using Multi Bit Flip-Flop
ย 
VoCoRoBo: Remote Speech Recognition and Tilt Sensing Multi-Robotic System
VoCoRoBo: Remote Speech Recognition and Tilt Sensing Multi-Robotic SystemVoCoRoBo: Remote Speech Recognition and Tilt Sensing Multi-Robotic System
VoCoRoBo: Remote Speech Recognition and Tilt Sensing Multi-Robotic System
ย 
Introduction to spred spectrum and CDMA
Introduction to spred spectrum and CDMAIntroduction to spred spectrum and CDMA
Introduction to spred spectrum and CDMA
ย 
Implementation of UART with BIST Technique Using Low Power LFSR
Implementation of UART with BIST Technique Using Low Power LFSRImplementation of UART with BIST Technique Using Low Power LFSR
Implementation of UART with BIST Technique Using Low Power LFSR
ย 
frogcelsat
frogcelsatfrogcelsat
frogcelsat
ย 
Fsk modulation and demodulation
Fsk modulation and demodulationFsk modulation and demodulation
Fsk modulation and demodulation
ย 
AREA OPTIMIZED FPGA IMPLEMENTATION FOR GENERATION OF RADAR PULSE COM-PRESSION...
AREA OPTIMIZED FPGA IMPLEMENTATION FOR GENERATION OF RADAR PULSE COM-PRESSION...AREA OPTIMIZED FPGA IMPLEMENTATION FOR GENERATION OF RADAR PULSE COM-PRESSION...
AREA OPTIMIZED FPGA IMPLEMENTATION FOR GENERATION OF RADAR PULSE COM-PRESSION...
ย 
Implementation of XOR Based Pad Generation Mutual Authentication Protocol for...
Implementation of XOR Based Pad Generation Mutual Authentication Protocol for...Implementation of XOR Based Pad Generation Mutual Authentication Protocol for...
Implementation of XOR Based Pad Generation Mutual Authentication Protocol for...
ย 

Recently uploaded

Opportunity scholarships and the schools that receive them
Opportunity scholarships and the schools that receive themOpportunity scholarships and the schools that receive them
Opportunity scholarships and the schools that receive them
EducationNC
ย 
Library news letter Kitengesa Uganda June 2024
Library news letter Kitengesa Uganda June 2024Library news letter Kitengesa Uganda June 2024
Library news letter Kitengesa Uganda June 2024
Friends of African Village Libraries
ย 
Creating Images and Videos through AI.pptx
Creating Images and Videos through AI.pptxCreating Images and Videos through AI.pptx
Creating Images and Videos through AI.pptx
Forum of Blended Learning
ย 
managing Behaviour in early childhood education.pptx
managing Behaviour in early childhood education.pptxmanaging Behaviour in early childhood education.pptx
managing Behaviour in early childhood education.pptx
nabaegha
ย 
Observational Learning
Observational Learning Observational Learning
Observational Learning
sanamushtaq922
ย 
Get Success with the Latest UiPath UIPATH-ADPV1 Exam Dumps (V11.02) 2024
Get Success with the Latest UiPath UIPATH-ADPV1 Exam Dumps (V11.02) 2024Get Success with the Latest UiPath UIPATH-ADPV1 Exam Dumps (V11.02) 2024
Get Success with the Latest UiPath UIPATH-ADPV1 Exam Dumps (V11.02) 2024
yarusun
ย 
The Science of Learning: implications for modern teaching
The Science of Learning: implications for modern teachingThe Science of Learning: implications for modern teaching
The Science of Learning: implications for modern teaching
Derek Wenmoth
ย 
Information and Communication Technology in Education
Information and Communication Technology in EducationInformation and Communication Technology in Education
Information and Communication Technology in Education
MJDuyan
ย 
Diversity Quiz Prelims by Quiz Club, IIT Kanpur
Diversity Quiz Prelims by Quiz Club, IIT KanpurDiversity Quiz Prelims by Quiz Club, IIT Kanpur
Diversity Quiz Prelims by Quiz Club, IIT Kanpur
Quiz Club IIT Kanpur
ย 
220711130095 Tanu Pandey message currency, communication speed & control EPC ...
220711130095 Tanu Pandey message currency, communication speed & control EPC ...220711130095 Tanu Pandey message currency, communication speed & control EPC ...
220711130095 Tanu Pandey message currency, communication speed & control EPC ...
Kalna College
ย 
nutrition in plants chapter 1 class 7...
nutrition in plants chapter 1 class 7...nutrition in plants chapter 1 class 7...
nutrition in plants chapter 1 class 7...
chaudharyreet2244
ย 
Erasmus + DISSEMINATION ACTIVITIES Croatia
Erasmus + DISSEMINATION ACTIVITIES CroatiaErasmus + DISSEMINATION ACTIVITIES Croatia
Erasmus + DISSEMINATION ACTIVITIES Croatia
whatchangedhowreflec
ย 
Contiguity Of Various Message Forms - Rupam Chandra.pptx
Contiguity Of Various Message Forms - Rupam Chandra.pptxContiguity Of Various Message Forms - Rupam Chandra.pptx
Contiguity Of Various Message Forms - Rupam Chandra.pptx
Kalna College
ย 
220711130100 udita Chakraborty Aims and objectives of national policy on inf...
220711130100 udita Chakraborty  Aims and objectives of national policy on inf...220711130100 udita Chakraborty  Aims and objectives of national policy on inf...
220711130100 udita Chakraborty Aims and objectives of national policy on inf...
Kalna College
ย 
(T.L.E.) Agriculture: "Ornamental Plants"
(T.L.E.) Agriculture: "Ornamental Plants"(T.L.E.) Agriculture: "Ornamental Plants"
(T.L.E.) Agriculture: "Ornamental Plants"
MJDuyan
ย 
Creation or Update of a Mandatory Field is Not Set in Odoo 17
Creation or Update of a Mandatory Field is Not Set in Odoo 17Creation or Update of a Mandatory Field is Not Set in Odoo 17
Creation or Update of a Mandatory Field is Not Set in Odoo 17
Celine George
ย 
Slides Peluncuran Amalan Pemakanan Sihat.pptx
Slides Peluncuran Amalan Pemakanan Sihat.pptxSlides Peluncuran Amalan Pemakanan Sihat.pptx
Slides Peluncuran Amalan Pemakanan Sihat.pptx
shabeluno
ย 
How to Download & Install Module From the Odoo App Store in Odoo 17
How to Download & Install Module From the Odoo App Store in Odoo 17How to Download & Install Module From the Odoo App Store in Odoo 17
How to Download & Install Module From the Odoo App Store in Odoo 17
Celine George
ย 
Decolonizing Universal Design for Learning
Decolonizing Universal Design for LearningDecolonizing Universal Design for Learning
Decolonizing Universal Design for Learning
Frederic Fovet
ย 
Creativity for Innovation and Speechmaking
Creativity for Innovation and SpeechmakingCreativity for Innovation and Speechmaking
Creativity for Innovation and Speechmaking
MattVassar1
ย 

Recently uploaded (20)

Opportunity scholarships and the schools that receive them
Opportunity scholarships and the schools that receive themOpportunity scholarships and the schools that receive them
Opportunity scholarships and the schools that receive them
ย 
Library news letter Kitengesa Uganda June 2024
Library news letter Kitengesa Uganda June 2024Library news letter Kitengesa Uganda June 2024
Library news letter Kitengesa Uganda June 2024
ย 
Creating Images and Videos through AI.pptx
Creating Images and Videos through AI.pptxCreating Images and Videos through AI.pptx
Creating Images and Videos through AI.pptx
ย 
managing Behaviour in early childhood education.pptx
managing Behaviour in early childhood education.pptxmanaging Behaviour in early childhood education.pptx
managing Behaviour in early childhood education.pptx
ย 
Observational Learning
Observational Learning Observational Learning
Observational Learning
ย 
Get Success with the Latest UiPath UIPATH-ADPV1 Exam Dumps (V11.02) 2024
Get Success with the Latest UiPath UIPATH-ADPV1 Exam Dumps (V11.02) 2024Get Success with the Latest UiPath UIPATH-ADPV1 Exam Dumps (V11.02) 2024
Get Success with the Latest UiPath UIPATH-ADPV1 Exam Dumps (V11.02) 2024
ย 
The Science of Learning: implications for modern teaching
The Science of Learning: implications for modern teachingThe Science of Learning: implications for modern teaching
The Science of Learning: implications for modern teaching
ย 
Information and Communication Technology in Education
Information and Communication Technology in EducationInformation and Communication Technology in Education
Information and Communication Technology in Education
ย 
Diversity Quiz Prelims by Quiz Club, IIT Kanpur
Diversity Quiz Prelims by Quiz Club, IIT KanpurDiversity Quiz Prelims by Quiz Club, IIT Kanpur
Diversity Quiz Prelims by Quiz Club, IIT Kanpur
ย 
220711130095 Tanu Pandey message currency, communication speed & control EPC ...
220711130095 Tanu Pandey message currency, communication speed & control EPC ...220711130095 Tanu Pandey message currency, communication speed & control EPC ...
220711130095 Tanu Pandey message currency, communication speed & control EPC ...
ย 
nutrition in plants chapter 1 class 7...
nutrition in plants chapter 1 class 7...nutrition in plants chapter 1 class 7...
nutrition in plants chapter 1 class 7...
ย 
Erasmus + DISSEMINATION ACTIVITIES Croatia
Erasmus + DISSEMINATION ACTIVITIES CroatiaErasmus + DISSEMINATION ACTIVITIES Croatia
Erasmus + DISSEMINATION ACTIVITIES Croatia
ย 
Contiguity Of Various Message Forms - Rupam Chandra.pptx
Contiguity Of Various Message Forms - Rupam Chandra.pptxContiguity Of Various Message Forms - Rupam Chandra.pptx
Contiguity Of Various Message Forms - Rupam Chandra.pptx
ย 
220711130100 udita Chakraborty Aims and objectives of national policy on inf...
220711130100 udita Chakraborty  Aims and objectives of national policy on inf...220711130100 udita Chakraborty  Aims and objectives of national policy on inf...
220711130100 udita Chakraborty Aims and objectives of national policy on inf...
ย 
(T.L.E.) Agriculture: "Ornamental Plants"
(T.L.E.) Agriculture: "Ornamental Plants"(T.L.E.) Agriculture: "Ornamental Plants"
(T.L.E.) Agriculture: "Ornamental Plants"
ย 
Creation or Update of a Mandatory Field is Not Set in Odoo 17
Creation or Update of a Mandatory Field is Not Set in Odoo 17Creation or Update of a Mandatory Field is Not Set in Odoo 17
Creation or Update of a Mandatory Field is Not Set in Odoo 17
ย 
Slides Peluncuran Amalan Pemakanan Sihat.pptx
Slides Peluncuran Amalan Pemakanan Sihat.pptxSlides Peluncuran Amalan Pemakanan Sihat.pptx
Slides Peluncuran Amalan Pemakanan Sihat.pptx
ย 
How to Download & Install Module From the Odoo App Store in Odoo 17
How to Download & Install Module From the Odoo App Store in Odoo 17How to Download & Install Module From the Odoo App Store in Odoo 17
How to Download & Install Module From the Odoo App Store in Odoo 17
ย 
Decolonizing Universal Design for Learning
Decolonizing Universal Design for LearningDecolonizing Universal Design for Learning
Decolonizing Universal Design for Learning
ย 
Creativity for Innovation and Speechmaking
Creativity for Innovation and SpeechmakingCreativity for Innovation and Speechmaking
Creativity for Innovation and Speechmaking
ย 

Lfsr report

  • 1. PROJECTBASED LAB REPORT On DESIGN OF 4-BIT LINEAR FEEDBACK SHIFT REGISTER By E.Nandnaa Priyanka CONTENTS 1. Introduction 2. Circuit diagram 3. Principle 4. Circuit design components 5. Working 6. Applications 7. Conclusion 8. Reference
  • 2. Introduction: A linear feedback shifts register (LFSR) is the shift register including input bit which is the direct operation of its old block. The unique direct operation of single bits is XOR and hence this is the shift register in which input bit is operated through the exclusive-OR (XOR) of few of the bits of the complete the value of shift register. The LFSR starting value is known as the seed since the function of the register is evaluated and the flow of values generated through the register is entirely evaluated through its present place. In the similar way, the register includes the finite amount of possible places and it should have the repeating forms. Nevertheless, the LFSR including well-chosen feedback operation is able to generate the series of bits that looks random that includes lengthy cycle. The n-bit LFSR is the length of n-bit shift register including feedback and input. The feedback is resulted from XORing or XNORing which is the result of chosen levels of the shift register which is defined like โ€˜tapsโ€™. Every level includes general clock. The โ€˜linearโ€™ portion of the โ€˜LFSRโ€™ is referred from the XOR and XNOR which are linear operations. LFSRs are used under hardware and it is beneficial under applications which need very quick process of the pseudo-random series like direct-series spectrum radio. LFSRs are utilized to produce the closeness of white noise under many executable sound producers. The Global Positioning System makes use of LFSR to quickly shift the series which shows high-precision respective time offsets.
  • 3. CIRCUIT DIAGRAM: PRINCIPLE: A pseudorandom number generator is an algorithm for generating sequence of numbers whose properties approximate the properties of sequence of random numbers. The PRNG generated sequence is not truly random because it is completely determining by a relative set of intial values. So, it helps us to send a secret message to the receivers in a coded form. The receiver decodes the code sent in order to receive the message hidden in it.
  • 4. CIRCUIT DIAGRAM COMPONENTS: D-FLIP FLOPS: The D Flip Flop is by far the most important of the clocked flip-flops as it ensures that ensures that inputs S and R are never equal to one at the same time. The D-type flip flop is constructed from a gated SR flip-flop with an inverter added between the S and the R inputs to allow for a single D (data) input. XOR GATE: An XOR gate (sometimes referred to by its extended name, Exclusive OR gate) is a digital logic gate with two or more inputs and one output that performs exclusive disjunction. The output of an XOR gate is true only when exactly one of its inputs is true. If both of an XOR gate's inputs are false, or if both of its inputs are true, then the output of the XOR gate is false. CLOCK: In electronics and especially synchronous digital circuits, a clock signal is a particular type of signal that oscillates between a high and a low state and is utilized like a metronome to coordinate actions of digital circuits.
  • 5. WORKING: ๏‚ท Initially the code is given to the D-Flip Flop, say โ€˜1000โ€™. ๏‚ท The last two digits undergo XOR using the truth table: here, โ€˜0 0โ€™ undergo XOR: out=0. ๏‚ท The Resulted value shifts to left to starting and the first 3 digits shifts right. RESULT: ๏‚ท Similarly, the process continues till we get the same code โ€˜1000โ€™. ๏‚ท It is observed that, it takes 15 cycles to come back to the same code entered initially. ๏‚ท This generally works with clock pulse, the XOR is applied to last to 2 digits when the clock pulse is given. ๏‚ท For every clock pulse the code is left shifted undergoing XOR operation. 1 0 0 0 0 1 0 0
  • 6. APPLICATIONS: LFSRs can be implemented in hardware, and this makes them useful in applications that require very fast generation of a pseudo-random sequence, such as direct-sequence spread spectrum radio. LFSRs have also been used for generating an approximation of white noise in various programmable sound generators. The Global Positioning System uses an LFSR to rapidly transmit a sequence that indicates high-precision relative time offsets. Uses as counters: The repeating sequence of states of an LFSR allows it to be used as a clock divider, or as a counter when a non-binary sequence is acceptable as is often the case where computer index or framing locations need to be machine-readable. LFSR counters have simpler feedback logic than natural binary counters or Gray code counters, and therefore can operate at higher clock rates. However, it is necessary to ensure that the LFSR never enters an all-zeros state, for example by pre-setting it at start-up to any other state in the sequence. Uses in cryptography: LFSRs have long been used as pseudo-random number generators for use in stream ciphers (especially in military cryptography), due to the ease of construction from simple electro- mechanical or electronic circuits, long periods, and very uniformly distributed output streams. However, an LFSR is a linear system, leading to fairly easy cryptanalysis. For example, given a stretch of known plaintext and corresponding cipher text, an attacker can intercept and recover a stretch of LFSR output stream used in the system described, and from that stretch of the output stream can construct an LFSR of minimal size that simulates the intended receiver. This LFSR can then be fed the intercepted stretch of output stream to recover the remaining plaintext. Three general methods are employed to reduce this problem in LFSR-based stream ciphers: Non-linear combination of several bits from the LFSR state. Non-linear combination of the output bits of two or more LFSRs. Irregular clocking of the LFSR, as in the alternating step generator.
  • 7. Uses in digital broadcasting and communications: To prevent short repeating sequences (e.g., runs of 0's or 1's) from forming spectral lines that may complicate symbol tracking at the receiver or interfere with other transmissions, linear feedback registers are often used to "randomize" the transmitted bit stream. This randomization is removed at the receiver after demodulation. When the LFSR runs at the same rate as the transmitted symbol stream, this technique is referred to as scrambling. When the LFSR runs considerably faster than the symbol stream, expanding the bandwidth of the transmitted signal, this is direct-sequence spread spectrum. Digital broadcasting systems that use linear feedback registers: ๏‚ท ATSC Standards (digital TV transmission system โ€“ North America) ๏‚ท DAB (Digital Audio Broadcasting system โ€“ for radio) ๏‚ท DVB-T (digital TV transmission system โ€“ Europe, Australia, parts of Asia) ๏‚ท NICAM (digital audio system for television) Other digital communications systems using LFSRs: ๏‚ท IBS (INTELSAT business service) ๏‚ท IDR (Intermediate Data Rate service) ๏‚ท SDI (Serial Digital Interface transmission) ๏‚ท Data transfer over PSTN (according to the ITU-T V-series recommendations) ๏‚ท CDMA (Code Division Multiple Access) cellular telephony ๏‚ท 100BASE-T2 "fast" Ethernet scrambles bits using an LFSR ๏‚ท 1000BASE-T Ethernet, the most common form of Gigabit Ethernet, scrambles bits using an LFSR ๏‚ท PCI Express 3.0 ๏‚ท USB 3.0 ๏‚ท IEEE 802.11a scrambles bits using an LFSR
  • 8. STIMULATION: CONCLUSION: Linear Feedback Shift Register (LFSR) Project is concluded that LFSRs is utilized like the pseudo-random number producers to be utilized under stream ciphers particularly under military cryptography because of the ease of building from electronic circuits or electro- mechanical. REFERENCE: 1)www.wikipedia.in 2)www.google.com 3)www.quora.aom
  ็ฟป่ฏ‘๏ผš